Pinout

Specification

  • Core: ARM Cortex-M3 CPU with up to 120 MHz
  • Clock source
    • HSE crystal: 12.0 MHz
    • LSE crystal: 32.768 kHz
  • Power supply
    • VDD: 2.7 to 3.6V (about 40mA)
    • VBAT: 1.7 to 3.6V (backup battery)
  • 5V tolerant pins (except reset)
  • -40°C to 85°C temperature range
  • LQFP64 package (10x10mm)
  • Further specifications: STM32F205R datasheet

Pinout

PinFunction
1VBAT, connect to VDD if not used
2-
3OSC32_IN (LSE/RTC), leave unconnected when not used
4OSC32_OUT (LSE/RTC), leave unconnected when not used
5OSC_IN (HSE)
6OSC_OUT (HSE)
7NRST (Reset), not 5V tolerant, connect 10k resistor to VDD when not used
8-
9-
10-
11-
12GND
13VDD
14Wakeup or EFC (PA0), internal pulldown
15-
16-
17-
18GND
19VDD
20Data Ready (PA4), high active output
21-
22SPI MISO or UART Busy (PA6)
23SPI MOSI (PA7), internal pulldown
24SD WP (PC4), high=write protected, internal pullup
25SD CD (PC5), high=no card, internal pullup
26-
27-
28BOOT1, connect 10k resistor to GND
29-
30-
31VCAP_1, connect 2.2uF capacitor to GND
32VDD
33-
34-
35USB U1 D- (PB14), 22 ohm resistor in series
36USB U1 D+ (PB15), 22 ohm resistor in series
37-
38-
39SD D0 (PC8), internal pullup
40SD D1 (PC9), internal pullup
41-
42UART TX (PA9)
43UART RX or SPI/I2C Busy (PA10)
44USB U0 D- (PA11), 22 ohm resistor in series
45USB U0 D+ (PA12), 22 ohm resistor in series
46SWDIO, leave unconnected
47VCAP_2, connect 2.2uF capacitor to GND
48VDD
49SWCLK, leave unconnected
50SPI CS (PA15), internal pulldown
51SD D2 (PC10), internal pullup
52SD D3 (PC11), internal pullup
53SD CLK (PC12)
54SD CMD (PD2), internal pullup
55SPI SCK (PB3), internal pullup
56-
57-
58I2C SCL (PB6)
59I2C SDA (PB7)
60BOOT0, connect 10k resistor to GND or VDD
61-
62-
63GND
64VDD

Do not connect any pin that has no function (description -).

Hardware Design

Power Supply

A standard 3.3V power source (with at least 50mA) for digital circuits is needed to power the FATSC processor. 100nF decoupling capacitors are needed near every VDD power pin. If the power supply regulator is not nearby then add a 4.7 to 22uF capacitor near to the FATSC processor.

Crystals

The main system clock is provided with a 12MHz HSE crystal (load capacitance about 18pF). For the optional RTC a 32.768kHz LSE crystal (load capacitance about 12pF) is needed. There is a failover to the internal clock, if the external HSE crystal fails. The crystal operating states are shown in the auxiliary status register.

Real-Time-Clock

The internal clock resets on power loss. With an external 32.768kHz crystal and backup battery on VBAT (1.7-3.6V) the clock can run independently. To prevent power loss on the VBAT power input two diodes can be used to combine the battery source and the main power (VDD). See the FATSC Dev-Kit schematics for further information.

USB-Ports

On the USB host ports a 4.7 to 22uF capacitor and a polyfuse for over-current protection is recommended. The USB data signals have to be connected with 22 ohm resistors to the FATSC processor. For ESD and EMI protection recommendations have a look in the STM32 Appnote AN4879.

SD-Card

A 4.7 to 22uF low ESR capacitor is recommended on the SD socket power supply pin and 47k to 100k pullup resistors on the D0, D1, D2, D3 and CMD pin. On a card insertion a high current can be drawn and the power circuit has to be able to deliver this surge current. Best practice is to use a separate 3.3V voltage regulator (with at least 100mA) for the SD card to prevent voltage drops on the 3.3V power supply of the FATSC processor.